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1 Burnside Computer Architecture- General

The Anatomy of a High Performance Microprocessor (Interactive Book/CD-ROM): A Systems Perspective with CDROM

by

The Anatomy of a High Performance Microprocessor (Interactive Book/CD-ROM): A Systems Perspective with CDROM Cover

 

Synopses & Reviews

Publisher Comments:

Overview of the Companion CD-ROM

Technical Presentations

10 presentations focusing on various book topics (e.g., Instruction Set Architectures, Instruction Level Parallelism, Rambus and Direct DRAM, Platform Components for 3D Graphics)

Video Clips

21 video clips where engineers and scientists respond to questions related to the design and implementation of a contemporary microprocessor, the AMD K6 3D

Simulators

HDL simulators with comprehensive manuals and tutorials: VHDL, Verilog, and a combined timing diagram editor and test vector generators. The reader can write simulations of the architectural elements discussed in the book

Hypertext Version of the Book

A completely hypertexted copy of the book, not just the obvious hyperlinks like the table of contents, list of figures and tables, and glossary/index, but also key figures are linked to the describing elements in the figures. All of the material on the CD-ROM is hyperlinked within the book.

Articles from Professional Society Periodicals and Conference Proceedings

45 articles from professional society periodicals and conference proceedings (e.g., Computer, IEEE Micro, IEEE Design & Test of Computers, IEEE Transactions on Computers, IEEE Journal of Solid State Circuits, IEEE Annals of the History of Computing, Workshops on Microprogramming, International Symposia on Microarchitecture, International Solid State Circuits Conference)

Reports and Documents such as Specifications, Product Data Sheets, University and Government Reports, and Industry and IEEE Standards

Over 30 complete databooks, datasheets, white papers, specifications, and standards - both important IEEE standards and "de facto" industrial standards, 18 articles from respected industrial publications (e.g., IBM Journal of Research and Development and the Microprocessor Report)

Audio Clips

Over a dozen audio clips on key topics in the book (e.g., various platform, system, and architectural issues)

Book News Annotation:

Describes the microarchitecture of a high-performance microprocessor, and discusses the platform and system issues related to designing and implementing microprocessor-based systems. The authors use AMD's K6 3D microprocessor as a case study to illustrate such aspects as the scheduler, the operation commit unit, and the register renaming scheme. The accompanying CD-ROM includes 21 video clips, HDL simulators, a hypertexted copy of the book, and 45 articles from journals and proceedings. Annotation c. by Book News, Inc., Portland, OR (booknews.com)

Description:

System requirements: Any system with CD-ROM reader, video board, sound card; Acrobat Reader with Search Version 3.01 or higher; standard plug-ins. Includes bibliographical references and index.

About the Author

Bruce Shriver received his PhD in Computer Science from SUNY/Buffalo. He has published and lectured internationally in the design and implementation of computer hardware and software systems. Shriver was made an IEEE Fellow for his work in Computer Systems Organization and Microprogramming. He was president of the IEEE Computer Society in 1992. He has been editor-in-chief of Computer and IEEE Software and the program or general chair of over 35 international meetings. Bruce was Department Group Manager of Software Technology at IBM's T. J. Watson Research Center. He was Vice-President for Research at the University of Southwestern Louisiana where he also held an Eminent Scholar Chair in Computer Science. He is an adjunct professor of Computer Science at the University of Tromso in Norway. Shriver is currently a consultant in high-performance computer systems (hardware and software), as well as intellectual property and related areas. Bruce Shriver ca be contacted at: http://www.genesis2.com/genesis2/

Bennett Smith is a consultant in microprocessors, computing-platforms, and related intellectual property. He is co-inventor on three branch-prediction patents. He is also a registered patent agent and has written specifications or contributed strategic claims in over 20 issued patents since 1993. Smith received his BSEE in 1980 from Texas A&M and subsequently worked as an IC designer at Texas Instruments and Hewlett-Packard. In 1984, he received his MSEE from UC Berkeley, where he studied microprocessor logic design and wrote his thesis under Nick Tredennick. He worked on processor projects during 1984-1989 at the IBM T.J. Watson Research Center (on the Micro/370) and at NexGen (on the Nx586, as employee number 6). Smith did design and intellectual property consulting during 1989-1992 for Tredennick, Incorporated. He managed NexGen's intellectual property activities during 1993-1995. He is an IEEE member, is married, has four children, and lives and works in Palo Alto, California. Bennett Smith can be contacted at: http://www.wbsmith.com/

Table of Contents

Preface.

List of Figures.

List of tables.

1. Microprocessors, Platforms, and Systems.

2. A Microarchitecture Case Study.

3. The K6 3D Microarchitecture.

4. Technology Components of Platform Architecture.

5. Platform Memory Technology.

6. Platform Optimization Techniques and Directions.

References to Authors and Other Individuals.

References to Suggested Readings.

Glossary/Index.

Product Details

ISBN:
9780818684005
Subtitle:
A Systems Perspective
Author:
Shriver, Bruce D.
Author:
Smith, Bennett
Publisher:
Wiley-IEEE Computer Society Pr
Location:
Los Alamitos, Calif.
Subject:
Microprocessors
Subject:
Computer Architecture
Subject:
Computer Engineering
Subject:
High performance computing
Subject:
Computer Architecture - General
Subject:
General Computers
Subject:
Architecture
Copyright:
Edition Description:
CD
Series:
Systems
Series Volume:
5
Publication Date:
19980618
Binding:
Hardback
Grade Level:
General/trade
Language:
English
Illustrations:
Yes
Pages:
546
Dimensions:
265 x 208 x 39.5 mm 53.52 oz

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Computers and Internet » Computer Architecture » General

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