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  $168.75
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Verification Plans: The Five-Day Verification Strategy for Modern Hardwareverification Languagesby Peet James
Synopses & ReviewsPublisher Comments:The task of verification is always larger than the task of thedesign effort. Why? Because the verification system has to encompassthe entire functionality of the device under verification. It has tomimic the real world environment that the device will actual operatein. It needs to catch functional errors. It needs to give feedbackinformation to guide further verification.The design effort proceeds from a design specification. Verificationsystems need to proceed from a verification plan. A comprehensivedocument that describes the verification system and all itscomponents. A plan that details how the verification system will bebuilt. With the advent of hardware verification languages, today'sverifications systems have grown in complexity making verificationplans even more paramount.This book is a practical guide on how to get a verification teamjumpstarted into verification success by the joint creation of averification plan. The book includes: Book News Annotation:Primarily for hardware verification engineers but also design, system
administration, and other engineers, consultant James outlines a
process for developing a verification plan that he says will engage
all members of a verification team by making clear to them what the
team requires of them as part of the process of verifying a computer
chip. Readers will find the going easier, he says, if they know a
hardware description language and even easier if they know a hardware
verification language, but all that is really required is a basic
understanding of the tasks and problems with building and verifying
modern hardware.
Annotation ©2004 Book News, Inc., Portland, OR (booknews.com) Synopsis:This book is a practical guide on how to get a verification team jumpstarted into verification success by the joint creation of a verification plan. The book includes: -A detailed five day approach that gives day by day, step by step instructions on how to design and document your verification system. -An introduction to hardware verification languages, their pseudo-random mindset, their enabling methodologies (generation, checking and coverage), and how these effect the development of a verification plan. -Practical guidance in common people issues, formatting decisions and information extraction methods to enhance your verification plan brainstorming sessions. -An appendix full of verification plan examples and support documents. What Our Readers Are SayingBe the first to add a comment for a chance to win!Product Details
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