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Advanced Model Order Reduction Techniques in VLSI Design Advanced Model Order Reduction Techniques in VLSI Design

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Synopses & Reviews

Publisher Comments:

Model order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the way to higher operating speeds and smaller feature sizes. This book presents a systematic introduction to, and treatment of, the key MOR methods employed in general linear circuits, using real-world examples to illustrate the advantages and disadvantages of each algorithm. Following a review of traditional projection-based techniques, coverage progresses to advanced 'state-of-the-art' MOR methods for VLSI design, including HMOR, passive truncated balanced realization (TBR) methods, efficient inductance modeling via the VPEC model, and structure-preserving MOR techniques. Where possible, numerical methods are approached from the CAD engineer's perspective, avoiding complex mathematics and allowing the reader to take on real design problems and develop more effective tools. With practical examples and over 100 illustrations, this book is suitable for researchers and graduate students of electrical and computer engineering, as well as practitioners working in the VLSI design industry.

Synopsis:

Systematic introduction to key model order reduction techniques in linear circuits, using real-world examples to illustrate advantages and disadvantages.

Synopsis:

As VLSI technology advances, the problem of 'parasitic' electromagnetic effects makes efficient simulation and verification of VLSI designs a growing challenge. A solution is to minimize the complexity of VLSI designs, which can be achieved using model order reduction (MOR) and compact modelling techniques. This book will provide a systematic introduction and analysis on the recent developments in MOR and realization techniques in VLSI design. The authors will describe a range of powerful new algorithms for reducing the complexity of VLSI circuitry, encompassing methods such as hierarchical MOR, vector potential equivalent circuits, truncated balanced realization, model passivity enforcement and model optimization, and circuit terminal reduction. This book will give both theoretical analysis and real practical examples to illustrate the effectiveness of each algorithm. Suitable for researchers and graduate students in electrical and computer engineering, as well as practitioners in the VLSI design industry.

Table of Contents

List of figures; List of tables; Preface; 1. Introduction; 2. Projection-based model order reduction algorithms; 3. Truncated balanced realization methods for model order reduction; 4. Passive balanced truncation of linear systems in descriptor form; 5. Passive hierarchical model order reduction; 6. Terminal reduction of linear dynamic circuits; 7. Vector potential equivalent circuit for inductance modeling; 8. Structure-preserving model order reduction; 9. Block structure-preserving reduction for RLCK circuits; 10. Model optimization and passivity enforcement; 11. General multi-port circuit realization; 12. Model order reduction for multi-terminal linear dynamic circuits; 13. Passive modeling by signal waveform shaping; References; Index.

Product Details

ISBN:
9780521865814
Author:
Tan, Sheldon
Publisher:
Cambridge University Press
Author:
He, Lei
Author:
Tan, Sheldon X-D
Location:
Cambridge
Subject:
Computer Engineering
Subject:
Design
Subject:
Integrated circuits
Subject:
Engineering-General Engineering
Copyright:
Publication Date:
20070631
Binding:
Hardcover
Grade Level:
Professional and scholarly
Language:
English
Illustrations:
Y
Pages:
240
Dimensions:
9.75x7.13x.71 in. 1.50 lbs.

Related Subjects

Engineering » Engineering » General Engineering
History and Social Science » World History » General
Science and Mathematics » Electricity » VHDL

Advanced Model Order Reduction Techniques in VLSI Design Advanced Model Order Reduction Techniques in VLSI Design Sale Hardcover
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Product details 240 pages Cambridge University Press - English 9780521865814 Reviews:
"Synopsis" by , Systematic introduction to key model order reduction techniques in linear circuits, using real-world examples to illustrate advantages and disadvantages.
"Synopsis" by , As VLSI technology advances, the problem of 'parasitic' electromagnetic effects makes efficient simulation and verification of VLSI designs a growing challenge. A solution is to minimize the complexity of VLSI designs, which can be achieved using model order reduction (MOR) and compact modelling techniques. This book will provide a systematic introduction and analysis on the recent developments in MOR and realization techniques in VLSI design. The authors will describe a range of powerful new algorithms for reducing the complexity of VLSI circuitry, encompassing methods such as hierarchical MOR, vector potential equivalent circuits, truncated balanced realization, model passivity enforcement and model optimization, and circuit terminal reduction. This book will give both theoretical analysis and real practical examples to illustrate the effectiveness of each algorithm. Suitable for researchers and graduate students in electrical and computer engineering, as well as practitioners in the VLSI design industry.
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