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Powell's Q&A | September 3, 2014

Emily St. John Mandel: IMG Powell’s Q&A: Emily St. John Mandel



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    Station Eleven

    Emily St. John Mandel 9780385353304

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This title in other editions

High Speed CMOS Design Styles

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High Speed CMOS Design Styles Cover

 

Synopses & Reviews

Publisher Comments:

High Speed CMOS Design Styles is written for the graduate-level student or practicing engineer who is primarily interested in circuit design. It is intended to provide practical reference, or `horse-sense', to mechanisms typically described with a more academic slant. This book is organized so that it can be used as a textbook or as a reference book. High Speed CMOS Design Styles provides a survey of design styles in use in industry, specifically in the high speed microprocessor design community. Logic circuit structures, I/O and interface, clocking, and timing schemes are reviewed and described. Characteristics, sensitivities and idiosyncrasies of each are highlighted. High Speed CMOS Design Styles also pulls together and explains contributors to performance variability that are associated with process, applications conditions and design. Rules of thumb and practical references are offered. Each of the general circuit families is then analyzed for its sensitivity and response to this variability. High Speed CMOS Design Styles is an excellent source of ideas and a compilation of observations that highlight how different approaches trade off critical parameters in design and process space.

Book News Annotation:

Seven authors with IBM Microelectronics provide a more pragmatic than academic survey for practicing engineers and graduate students in design styles used in the high speed microprocessor design industry. In keeping with the practical approach, the discussion rests on a foundation of the general circuit families, basic process-related design considerations, and rules of thumb for dealing with such matters as process-driven performance variation in quarter-micron CMOS. Diagram-studded chapters cover: process variability, non-clocked and clocked logic styles, circuit design margin and design variability, latching strategies, interface techniques, clocking styles, slack borrowing and time stealing, and future technology to enable circuit configurations not currently feasible. Annotation c. by Book News, Inc., Portland, OR (booknews.com)

Table of Contents

Preface. 1. Process Variability. 2. Non-Clocked Logic Styles. 3. Clocked Logic Styles. 4. Circuit Design Margin and Design Variability. 5. Latching Strategies. 6. Interface Techniques. 7. Clocking Styles. 8. Slack Borrowing and Time Stealing. 9. Future Technology. Index.

Product Details

ISBN:
9780792382201
Author:
Bernstein, Kerry
Publisher:
Springer
Author:
Durham, Christopher M.
Author:
Carrig, K.M.
Author:
Carrig, Keith M.
Author:
Hogenmiller, David
Author:
Hansen, Patrick R.
Author:
Nowak, Edward J.
Author:
Rohrer, Norman J.
Location:
Boston
Subject:
General
Subject:
Engineering - Electrical & Electronic
Subject:
Electronics - Semiconductors
Subject:
CAD-CAM - General
Subject:
Integrated circuits
Subject:
Electronic circuit design
Subject:
Metal oxide semiconductors, Complementary
Subject:
Electricity
Subject:
Electronics - Circuits - General
Subject:
Circuits and Systems
Subject:
Electrical engineering
Subject:
Computer-Aided Engineering (CAD, CAE) and Design
Subject:
Electricity-General Electronics
Copyright:
Edition Description:
Book
Series Volume:
GTR-337
Publication Date:
19980831
Binding:
HARDCOVER
Language:
English
Illustrations:
Yes
Pages:
372
Dimensions:
235 x 155 mm 1560 gr

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