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The SPARC Architecture Manual Version 9by Sparc International
Synopses & Reviews
This is the definitive reference for the latest generation of the enormously popular and influential SPARC microprocessors the 64-bit SPARC-V9 which is now being used by a variety of computer system vendors and is destined to set the standard for high performance capacity into the next century. Describes the architecture and instruction set of the 64-bit SPARC-V9 a RISC-style processor architecture that supports a linear address space accessed by 64-bit addresses, fault-tolerance, object-oriented software, lightweight threads, and superscalar and multiprocessor implementations. MARKETS: For implementors of the SPARC architecture, microprocessor designers, hardware engineers, developers of SPARC-V9 system software, software engineers who write SPARC-V9 software in assembly language; and for students of computer architecture.
SPARC (Scalable Processor Architecture) is the industry's only openly defined and evolved RISC architecture. Version 9 is the new 64-bit incarnation of SPARC - the most significant change since SPARC's introduction in 1987! Unlike other RISC (Reduced Instruction Set Computer) designs, SPARC specifies not a hardware implementation ("chip"), but an open, standard architecture belonging to the community of SPARC vendors and users. The SPARC specification is defined by the SPARC Architecture Committee, a technical arm of the computer-maker consortium, SPARC International. Version 9 provides 64-bit data and addressing, support for fault tolerance, fast context switching, support for advanced compiler optimizations, efficient design for Superscalar processors, and a clean structure for modern operating systems. The V9 architecture supplements, rather than replaces, the 32-bit Version 8 architecture. The non-privileged features of Version 9 are upward-compatible from Version 8, so 32-bit application software can execute natively, without modification, on Version 9 systems - no special "compatibility mode" is required. Publication of the Version 9 architecture marks a three-year development effort by SPARC International member companies from a broad cross-section of disciplines.
Table of Contents
3. Architectural Overview.
4. Data Formats.
8. Memory Models.
Annex A: (Normative) Instruction Definitions.
Annex B: (Normative) IEEE 754-1985 Requirements for SPARC-V9.
Annex C: (Normative) SPARC-V9 Implementation Dependencies.
Annex D: (Normative) Formal Specification of the Memory Models.
Annex E: (Informative) Opcode Maps.
Annex F: (Informative) SPARC-V9 MMU Requirements.
Annex G: (Informative) Suggested Assembly Language Syntax.
Annex H: (Informative) Software Considerations.
Annex I: (Informative) Extending the SPARC-V9 Architecture.
Annex J: (Informative) Programming With the Memory Models.
Annex K: (Informative) Changes from SPARC-V8 to SPARC-V9.
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