Low-Power Design of Nanometer FPGAs: Architecture and EDA (Morgan Kaufmann Series in Systems on Silicon)

Low-Power Design of Nanometer FPGAs Architecture and EDA is an invaluable reference for researchers and practicing engineers concerned with power-efficient, FPGA design. State-of-the-art power reduction techniques for FPGAs will be described and compared. These techniques can be applied at the circuit, architecture, and electronic design automation levels to describe both the dynamic and leakage power sources and enable strategies for codesign.

• Low-power techniques presented at key FPGA design levels for circuits, architectures, and electronic design automation, form critical, "bridge" guidelines for codesign
• Comprehensive review of leakage-tolerant techniques empowers designers to minimize power dissipation
• Provides valuable tools for estimating power efficiency/savings of current, low-power FPGA design techniques

FPGA technology has reached the nanometer realm. Designing for the low power that these semiconductors require has been a major hurdle towards developing optimized FPGA applications. Low-Power Design of Nanometer FPGAs is a valuable reference for any professional concerned with low power optimization specific to FPGA design.

Various dynamic power reduction techniques that can be applied at the circuit, architecture, and electronic design automation levels are detailed and evaluated. Along with these techniques is a discussion of the minimization of power dissipation. These design techniques presented together enable the reader to develop strategies for co-design.

• Understand the power needs of your FPGA design and how to implement the appropriate power-saving techniques
• Discover leakage reduction techniques using MTCMOS and Input Pin Reordering
• Achieve design balance by limiting power leakage and reducing power need

Hassan Hassan is currently a staff engineer in the timing and power group at Actel Corporation. He has authored/coauthored more than 20 papers in international journals and conferences. His research interests include integrated circuit design and design automation for deep submicron VLSI systems. He is also a member of the program committee for several IEEE conferences. Dr. Hassan received his Ph.D. in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 2008.

Mohab Anis is currently a tenured Associate Professor at the Department of Electrical and Computer Engineering, University of Waterloo. During 2009, he was with the Electronics Engineering Department at the American University in Cairo. Dr. Anis received his Ph.D. in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 2003. Dr. Anis is an Associate Editor of the IEEE Transactions on Circuits and Systems - II, Microelectronics Journal, Journal of Circuits, Systems and Computers, ASP Journal of Low Power Electronics, and VLSI Design. He was awarded the 2009 Early Research Award, the 2004 Douglas R. Colton Medal for Research Excellence in recognition of excellence in research leading to new understanding and novel developments in Microsystems in Canada and the 2002 International Low-Power Design Contest.

 

The essential guide to state-of-the-art, Low-Power Design for nanometer FPGAs!

FPGA technology has reached the nanometer realm. Designing for the low power that these semiconductors require has been a major hurdle towards developing optimized FPGA applications. Low-Power Design of Nanometer FPGAs is a valuable reference for any professional concerned with low power optimization specific to FPGA design.

Various dynamic power reduction techniques that can be applied at the circuit, architecture, and electronic design automation levels are detailed and evaluated. Along with these techniques is a discussion of the minimization of power dissipation. These design techniques presented together enable the reader to develop strategies for co-design.

• Understand the power needs of your FPGA design and how to implement the appropriate power-saving techniques
• Discover leakage reduction techniques using MTCMOS and Input Pin Reordering
• Achieve design balance by limiting power leakage and reducing power need

Hassan Hassan is currently a staff engineer in the timing and power group at Actel Corporation. He has authored/coauthored more than 20 papers in international journals and conferences. His research interests include integrated circuit design and design automation for deep submicron VLSI systems. He is also a member of the program committee for several IEEE conferences. Dr. Hassan received his Ph.D. in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 2008.

Mohab Anis is currently a tenured Associate Professor at the Department of Electrical and Computer Engineering, University of Waterloo. During 2009, he was with the Electronics Engineering Department at the American University in Cairo. Dr. Anis received his Ph.D. in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 2003. Dr. Anis is an Associate Editor of the IEEE Transactions on Circuits and Systems - II, Microelectronics Journal, Journal of Circuits, Systems and Computers, ASP Journal of Low Power Electronics, and VLSI Design. He was awarded the 2009 Early Research Award, the 2004 Douglas R. Colton Medal for Research Excellence in recognition of excellence in research leading to new understanding and novel developments in Microsystems in Canada and the 2002 International Low-Power Design Contest.

 

Chapter 1: FPGA Overview: Architecture and CAD Chapter 2: Power Dissipation in Modern FPGAs Chapter 3: Power Estimation in FPGAs Chapter 4: Dynamic Power Reduction Techniques in FPGAs Chapter 5: Leakage Power Reduction in FPGAs Using MTCMOS Techniques Chapter 6: Leakage Power Reduction in FPGAs Through Input Pin Reordering