- STAFF PICKS
- GIFTS + GIFT CARDS
- SELL BOOKS
- FIND A STORE
New Trade Paper
Currently out of stock.
available for shipping or prepaid pickup only
Other titles in the Prentice Hall Modern Semiconductor Design series:
Practical FPGA Programming in Cby David Pellerin
Synopses & Reviews
C-based techniques for building high-performance, FPGA-accelerated software applications
Circuits, Devices, and Systems
C-based Techniques for Optimizing FPGA Performance, Design Flexibility, and Time to Market
Forward written by Clive "Max" Maxfield.
High-performance FPGA-accelerated software applications are a growing demand in fields ranging from communications and image processing to biomedical and scientific computing. This book introduces powerful, C-based parallel-programming techniques for creating these applications, verifying them, and moving them into FPGA hardware.
The authors bridge the chasm between "conventional" software development and the methods and philosophies of FPGA-based digital design. Software engineers will learn to look at FPGAs as "just another programmable computing resource," while achieving phenomenal performance because much of their code is running directly in hardware. Hardware engineers will master techniques that perfectly complement their existing HDL expertise, while allowing them to explore design alternatives and create prototypes far more rapidly. Both groups will learn how to leverage C to support efficient hardware/software co-design and improve compilation, debugging, and testing.
About the Author
David Pellerin is president and founder of Impulse Accelerated Technologies, a firm that serves systems designers who want to use FPGAs for hardware-based software acceleration and fast prototyping of mixed hardware/software systems. His Prentice Hall PTR books include VHDL Made Easy, Practical Design Using Programmable Logic, Digital Design Using ABEL, and Electronic Design Automation for Windows. Scott Thibault is president and founder of Green Mountain Computing Systems, developers of custom and OEM software that leverages advanced HDL and C-to-RTL expertise to improve time-to-market. Dr. Thibault holds a Ph.D. in computer science from the University of Rennes.
© Copyright Pearson Education. All rights reserved.
Table of Contents
Foreword by Clive "Max" Maxfield.
Why is this book of interest to the hardware folks?
And what about the software guys and gals?
So what's the catch?
C Language for FPGA-Based Hardware Design?
Compelling Platforms for Software Acceleration.
The Power to Experiment.
How This Book Is Organized.
Where This Book Came From.
1. The FPGA as a Computing Platform.
A Quick Introduction to FPGAs.
FPGA-Based Programmable Hardware Platforms.
Increasing Performance While Lowering Costs.
The Role of Tools.
The FPGA as an Embedded Software Platform.
The Importance of a Programming Abstraction.
When Is C Language Appropriate for FPGA Design?
How to Use This Book.
2. A Brief History of Programmable Platforms.
The Origins of Programmable Logic.
Reprogrammability, HDLs, and the Rise of the FPGA.
Systems on a Programmable Chip.
FPGAs for Parallel Computing.
3. A Programming Model for FPGA-Based Applications.
Parallel Processing Models.
FPGAs as Parallel Computing Machines.
Programming for Parallelism.
Communicating Process Programming Models.
The Impulse C Programming Model.
4. An Introduction to Impulse C.
The Motivation Behind Impulse C.
The Impulse C Programming Model.
A Minimal Impulse C Program.
Processes, Streams, Signals, and Memory.
Impulse C Signed and Unsigned Datatypes.
Using Output Streams.
Using Input Streams.
Avoiding Stream Deadlocks.
Creating and Using Signals.
Using Shared Memories.
Memory and Stream Performance Considerations.
5. Describing a FIR Filter.
The FIR Filter Hardware Process.
The Software Test Bench.
6. Generating FPGA Hardware.
The Hardware Generation Flow.
Understanding the Generated Structure.
Stream and Signal Interfaces.
Using HDL Simulation to Understand Stream Protocols.
Debugging the Generated Hardware.
Hardware Generation Notes.
Making Efficient Use of the Optimizers.
Language Constraints for Hardware Processes.
7. Increasing Statement-Level Parallelism.
A Model of FPGA Computation.
C Language Semantics and Parallelism.
Exploiting Instruction-Level Parallelism.
Limiting Instruction Stages.
8. Porting a Legacy Application to Impulse C.
The Triple-DES Algorithm.
Converting the Algorithm to a Streaming Model.
Performing Software Simulation.
Compiling to Hardware.
Preliminary Hardware Analysis.
9. Creating an Embedded Test Bench.
A Mixed Hardware and Software Approach.
The Embedded Processor as a Test Generator.
The Role of Hardware Simulators.
Testing the Triple-DES Algorithm in Hardware.
Software Stream Macro Interfaces.
Building the Test System.
10. Optimizing C for FPGA Performance.
Rethinking an Algorithm for Performance.
Refinement 1: Reducing Size by Introducing a Loop.
Refinement 2: Array Splitting.
Refinement 3: Improving Streaming Performance.
Refinement 4: Loop Unrolling.
Refinement 5: Pipelining the Main Loop.
11. Describing System-Level Parallelism.
Performing Desktop Simulation.
Refinement 1: Creating Parallel 8-Bit Filters.
Refinement 2: Creating a System-Level Pipeline.
Moving the Application to Hardware.
12. Combining Impulse C with an Embedded Operating System.
The uClinux Operating System.
A uClinux Demonstration Project.
13. Mandelbrot Image Generation.
Expressing the Algorithm in C.
Creating a Fixed-Point Equivalent.
Creating a Streaming Version.
Parallelizing the Algorithm.
14. The Future Of FPGA Computing.
The FPGA as a High-Performance Computer.
The Future of FPGA Computing.
Appendix A. Getting the Most Out of Embedded FPGA Processors.
FPGA Embedded Processor Overview.
Peripherals and Memory Controllers.
Increasing Processor Performance.
Optimization Techniques That Are Not FPGA-Specific.
FPGA-Specific Optimization Techniques.
Appendix B. Creating a Custom Stream Interface.
The DS92LV16 Serial Link for Data Streaming.
Stream Interface State Machine Description.
Appendix C. Impulse C Function Reference.
Appendix D. Triple-Des Source Listings.
Appendix E. Image Filter Listings.
Appendix F. Selected References.
What Our Readers Are Saying