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Other titles in the Morgan Kaufmann Series in Computer Architecture and Design series:
Self-Checking and Fault-Tolerant Digital Designby Parag Lala
Synopses & Reviews
With VLSI chip transistors getting smaller and smaller, today's digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation.
Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance along with the practical techniques used to create fault-tolerant systems.
* Introduces reliability theory and the importance of maintainability
* Presents coding and the construction of several error detecting and correcting codes
* Discusses in depth, the available techniques for fail-safe design of combinational circuits
* Details checker design techniques for detecting erroneous bits and encoding output of self-checking circuits
* Demonstrates how to design self-checking sequential circuits, including a technique for fail-safe state machine design
ce of maintainability
Chip designers are packing more and more transistors on a chip, increasing not only chip power and performance, but also the potential for errors at the signal level. As a result, a whole set of fault tolerance techniques have been developed for designing circuits so that they detect and either mask or recover from faults which result from these errors. Self-checking circuits are an important part of creating a fault tolerant system.<P>Written by a leading researcher in self-checking circuit design, this book examines all the major techniques for hardware fault tolerance and presents the most comprehensive coverage available on techniques for implementing self-checking circuits, providing a uniquely valuable reference for today's practicing designers.
About the Author
The author is currently a Professor in the Department of Electrical Engineering at North Carolina A&T State University. He is the author of more than 75 papers, and three books published by Prentice Hall. His research interests include design for testability, self-checking logic design, automatic logic synthesis of low power logic circuits, andCPLD/FPGA based system design. He received a M.S. from King's College, London, and a Ph.D. from the City University of London.
North Carolina Agricultural and Technical State University
Table of Contents
Chapter 1 - Fundamentals of Reliability
Chapter 2 - Error Detecting and Correcting Codes
Chapter 3 - Self-Checking Combinational Logic Design
Chapter 4 - Self-Checking Checkers
Chapter 5 - Self-Checking Sequential Circuit Design
Chapter 6 - Fault-Tolerant Design
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