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Computer Arithmetic: Algorithms and Hardware Designs (Oxford Series in Electrical and Computer Engineering)

by

Computer Arithmetic: Algorithms and Hardware Designs (Oxford Series in Electrical and Computer Engineering) Cover

 

Synopses & Reviews

Publisher Comments:

Ideal for graduate and senior undergraduate courses in computer arithmetic and advanced digital design, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, provides a balanced, comprehensive treatment of computer arithmetic. It covers topics in arithmetic unit design and circuit implementation that complement the architectural and algorithmic speedup techniques used in high-performance computer architecture and parallel processing. Using a unified and consistent framework, the text begins with number representation and proceeds through basic arithmetic operations, floating-point arithmetic, and function evaluation methods. Later chapters cover broad design and implementation topics-including techniques for high-throughput, low-power, fault-tolerant, and reconfigurable arithmetic. An appendix provides a historical view of the field and speculates on its future.

An indispensable resource for instruction, professional development, and research, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, combines broad coverage of the underlying theories of computer arithmetic with numerous examples of practical designs, worked-out examples, and a large collection of meaningful problems. This second edition includes a new chapter on reconfigurable arithmetic, in order to address the fact that arithmetic functions are increasingly being implemented on field-programmable gate arrays (FPGAs) and FPGA-like configurable devices. Updated and thoroughly revised, the book offers new and expanded coverage of saturating adders and multipliers, truncated multipliers, fused multiply-add units, overlapped quotient digit selection, bipartite and multipartite tables, reversible logic, dot notation, modular arithmetic, Montgomery modular reduction, division by constants, IEEE floating-point standard formats, and interval arithmetic.

Features:

* Divided into 28 lecture-size chapters

* Emphasizes both the underlying theories of computer arithmetic and actual hardware designs

* Carefully links computer arithmetic to other subfields of computer engineering

* Includes 717 end-of-chapter problems ranging in complexity from simple exercises to mini-projects

* Incorporates many examples of practical designs

* Uses consistent standardized notation throughout

* Instructor's manual includes solutions to text problems

* An author-maintained website http://www.ece.ucsb.edu/~parhami/text_comp_arit.htm contains instructor resources, including complete lecture slides

Synopsis:

Ideal for graduate and senior undergraduate level courses in computer arithmetic and advanced digital design, Computer Arithmetic: Algorithms and Hardware Designs provides a balanced, comprehensive treatment of computer arithmetic, covering topics in arithmetic unit design and circuit implementation that complement the architectural and algorithmic speedup techniques used in high-performance computer architecture and parallel processing. Using a unified and consistent framework, the text begins with number representation and proceeds through basic arithmetic operations, floating-point arithmetic, and function evaluation methods. Later chapters cover broad design and implementation topics--including techniques for high-throughput, low-power, and fault-tolerant arithmetic--and also feature brief case studies.

An indispensable resource for instruction, professional development, and research in digital computer arithmetic, Computer Arithmetic: Algorithms and Hardware Designs combines broad coverage of the underlying theories of computer arithmetic with numerous examples of practical designs, worked-out examples, and a large collection of meaningful problems.

Features:

DT Divided into 28 lecture-size chapters

DT Emphasizes both the underlying theories of computer arithmetic and actual hardware designs

DT Carefully links computer arithmetic to other subfields of computer engineering

DT Includes over 450 end-of-chapter problems ranging in complexity from simple exercises to mini-projects

DT Incorporates many examples of practical designs

DT Uses consistent standardized notation throughout

DT Instructor's manual includes solutions to text problems, additional exercises, test questions, and enlarged versions of figures and charts

Table of Contents

Preface

PART I. NUMBER REPRESENTATION

1. NUMBERS AND ARITHMETIC

1.1. What is Computer Arithmetic?

1.2. A Motivating Example

1.3. Numbers and Their Encodings

1.4. Fixed-Radix Positional Number Systems

1.5. Number Radix Conversion

1.6. Classes of Number Representations

2. REPRESENTING SIGNED NUMBERS

2.1. Signed-Magnitude Representation

2.2. Biased Representations

2.3. Complement Representations

2.4. Two's- and 1's-Complement Numbers

2.5. Direct and Indirect Signed Arithmetic

2.6. Using Signed Positions or Signed Digits

3. REDUNDANT NUMBER SYSTEMS

3.1. Coping with the Carry Problem

3.2. Redundancy in Computer Arithmetic

3.3. Digit Sets and Digit-Set Conversions

3.4. Generalized Signed-Digit Numbers

3.5. Carry-Free Addition Algorithms

3.6. Conversions and Support Functions

4. RESIDUE NUMBER SYSTEMS

4.1. RNS Representation and Arithmetic

4.2. Choosing the RNS Moduli

4.3. Encoding and Decoding of Numbers

4.4. Difficult RNS Arithmetic Operations

4.5. Redundant RNS Representations

4.6. Limits of Fast Arithmetic in RNS

PART II. ADDITION/SUBTRACTION

5. BASIC ADDITION AND COUNTING

5.1. Bit-Serial and Ripple-Carry Adders

5.2. Conditions and Exceptions

5.3. Analysis of Carry Propagation

5.4. Carry Completion Detection

5.5. Addition of a Constant: Counters

5.6. Manchester Carry Chains and Adders

6. CARRY-LOOKAHEAD ADDERS

6.1. Unrolling the Carry Recurrence

6.2. Carry-Lookahead Adder Design

6.3. Ling Adder and Related Designs

6.4. Carry Determination as Prefix Computation

6.5. Alternative Parallel Prefix Networks

6.6. VLSI Implementation Aspects

7. VARIATIONS IN FAST ADDERS

7.1. Simple Carry-Skip Adders

7.2. Multilevel Carry-Skip Adders

7.3. Carry-Select Adders

7.4. Conditional-Sum Adder

7.5. Hybrid Adder Designs

7.6. Optimizations in Fast Adders

8. MULTI-OPERAND ADDITION

8.1. Using Two-Operand Adders

8.2. Carry-Save Adders

8.3. Wallace and Dadda Trees

8.4. Parallel Counters

8.5. Generalized Parallel Counters

8.6. Adding Multiple Signed Numbers

PART III. MULTIPLICATION

9. BASIC MULTIPLICATION SCHEMES

9.1. Shift/Add Multiplication Algorithms

9.2. Programmed Multiplication

9.3. Basic Hardware Multipliers

9.4. Multiplication of Signed Numbers

9.5. Multiplication by Constants

9.6. Preview of Fast Multipliers

10. HIGH-RADIX MULTIPLIERS

10.1. Radix-4 Multiplication

10.2. Modified Booth's Recoding

10.3. Using Carry-Save Adders

10.4. Radix-8 and Radix-16 Multipliers

10.5. Multibeat Multipliers

10.6. VLSI Complexity Issues

11. TREE AND ARRAY MULTIPLIERS

11.1. Full Tree Multipliers

11.2. Alternative Reduction Trees

11.3. Tree Multipliers for Signed Numbers

11.4. Partial-Tree Multipliers

11.5. Array Multipliers

11.6. Pipelined Tree and Array Multipliers

12. VARIATIONS IN MULTIPLIERS

12.1. Divide-and-Conquer Designs

12.2. Additive Multiply Modules

12.3. Bit-Serial Multipliers

12.4. Modular Multipliers

12.5. The Special Case of Squaring

12.6. Combined Multiply-Add Units

PART IV. DIVISION

13. BASIC DIVISION SCHEMES

13.1. Shift/Subtract Division Algorithms

13.2. Programmed Division

13.3. Restoring Hardware Dividers

13.4. Nonrestoring and Signed Division

13.5. Division by Constants

13.6. Preview of Fast Dividers

14. HIGH-RADIX DIVIDERS

14.1. Basics of High-Radix Division

14.2. Radix-2 SRT Division

14.3. Using Carry-Save Adders

14.4. Choosing the Quotient Digits

14.5. Radix-4 SRT Division

14.6. General High-Radix Dividers

15. VARIATIONS IN DIVIDERS

15.1. Quotient-Digit Selection Revisited

15.2. Using p-d Plots in Practice

15.3. Division with Prescaling

15.4. Modular Dividers and Reducers

15.5. Array Dividers

15.6. Combined Multiply/Divide Units

16. DIVISION BY CONVERGENCE

16.1. General Convergence Methods

16.2. Division by Repeated Multiplications

16.3. Division by Reciprocation

16.4. Speedup of Convergence Division

16.5. Hardware Implementation

16.6. Analysis of Lookup Table Size

PART V. REAL ARITHMETIC

17. FLOATING-POINT REPRESENTATIONS

17.1. Floating-Point Numbers

17.2. The ANSI/IEEE Floating-Point Standard

17.3. Basic Floating-Point Algorithms

17.4. Conversions and Exceptions

17.5. Rounding Schemes

17.6. Logarithmic Number Systems

18. FLOATING-POINT OPERATIONS

18.1. Floating-point Adders/Subtractors

18.2. Pre- and Postshifting

18.3. Rounding and Exceptions

18.4. Floating-Point Multipliers

18.5. Floating-Point Dividers

18.6. Logarithmic Arithmetic Unit

19. ERRORS AND ERROR CONTROL

19.1. Sources of Computational Errors

19.2. Invalidated Laws of Algebra

19.3. Worst-Case Error Accumulation

19.4. Error Distribution and Expected Errors

19.5. Forward Error Analysis

19.6. Backward Error Analysis

20. PRECISE AND CERTIFIABLE ARITHMETIC

20.1. High Precision and Certifiability

20.2. Exact Arithmetic

20.3. Multiprecision Arithmetic

20.4. Variable-Precision Arithmetic

20.5. Error Bounding via Interval Arithmetic

20.6. Adaptive and Lazy Arithmetic

PART VI. FUNCTION EVALUATION

21. SQUARE-ROOTING METHODS

21.1. The Pencil-and-Paper Algorithm

21.2. Restoring Shift/Subtract Algorithm

21.3. Binary Nonrestoring Algorithm

21.4. High-Radix Square-Rooting

21.5. Square-Rooting by Convergence

21.6. Parallel Hardware Square-Rooters

22. THE CORDIC ALGORITHMS

22.1. Rotations and Pseudorotations

22.2. Basic CORDIC Iterations

22.3. CORDIC Hardware

22.4. Generalized CORDIC

22.5. Using the CORDIC Method

22.6. An Algebraic Formulation

23. VARIATIONS IN FUNCTION EVALUATION

23.1. Additive/Multiplicative Normalization

23.2. Computing Logarithms

23.3. Exponentiation

23.4. Division and Square-Rooting, Again

23.5. Use of Approximating Functions

23.6. Merged Arithmetic

24. ARITHMETIC BY TABLE LOOKUP

24.1. Direct and Indirect Table Lookup

24.2. Binary-to-Unary Reduction

24.3. Tables in Bit-Serial Arithmetic

24.4. Interpolating Memory

24.5. Trade-Offs in Cost, Speed, and Accuracy

24.6. 6 Piecewise Lookup Tables

Part VII. IMPLEMENTATION TOPICS

25. HIGH-THROUGHPUT ARITHMETIC

25.1. Pipelining of Arithmetic Functions

25.2. Clock Rate and Throughput

25.3. The Earle Latch

25.4. Parallel and Digital-Serial Pipelines

25.5. On-Line or Digital-Pipelined Arithmetic

25.6. Systolic Arithmetic Units

26. LOW-POWER ARITHMETIC

26.1. The Need for Low-Power Design

26.2. Sources of Power Consumption

26.3. Reduction of Power Waste

26.4. Reduction of Activity

26.5. Transformations and Trade-Offs

26.6. Some Emerging Methods

27. FAULT-TOLERANT ARITHMETIC

27.1. Faults, Errors, and Error Codes

27.2. Arithmetic Error-Detecting Codes

27.3. Arithmetic Error-Correcting Codes

27.4. Self-Checking Function Units

27.5. Algorithm-Based Fault Tolerance

27.6. Fault-Tolerant RNS Arithmetic

28. PAST, PRESENT, AND FUTURE

28.1. Historical Perspective

28.2. An Early High-Performance Machine

28.3. A Modern Vector Supercomputer

28.4. Digital Signal Processors

28.5. A Widely Used Microprocessor

28.6. Trends and Future Outlook

Index

Each chapter ends with Problems and References

Product Details

ISBN:
9780195328486
Author:
Parhami, Behrooz
Publisher:
Oxford University Press, USA
Author:
null, Behrooz
Subject:
Computer Engineering
Subject:
Computer algorithms
Subject:
Computer arithmetic.
Subject:
Programming - General
Subject:
Engineering
Subject:
Technology | Electrical
Subject:
Engineering & Technology | Electrical & Computer Engineering
Subject:
Engineering-General Engineering
Edition Description:
Hardcover
Series:
Oxford Series in Electrical and Computer Engineering
Publication Date:
20091031
Binding:
HARDCOVER
Grade Level:
College/higher education:
Language:
English
Illustrations:
300 line illus.
Pages:
672
Dimensions:
7.4 x 9.4 x 1.3 in 2.869 lb

Related Subjects

Computers and Internet » Computers Reference » General
Computers and Internet » Software Engineering » Programming and Languages
Engineering » Engineering » General Engineering

Computer Arithmetic: Algorithms and Hardware Designs (Oxford Series in Electrical and Computer Engineering) New Hardcover
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$202.50 In Stock
Product details 672 pages Oxford University Press, USA - English 9780195328486 Reviews:
"Synopsis" by , Ideal for graduate and senior undergraduate level courses in computer arithmetic and advanced digital design, Computer Arithmetic: Algorithms and Hardware Designs provides a balanced, comprehensive treatment of computer arithmetic, covering topics in arithmetic unit design and circuit implementation that complement the architectural and algorithmic speedup techniques used in high-performance computer architecture and parallel processing. Using a unified and consistent framework, the text begins with number representation and proceeds through basic arithmetic operations, floating-point arithmetic, and function evaluation methods. Later chapters cover broad design and implementation topics--including techniques for high-throughput, low-power, and fault-tolerant arithmetic--and also feature brief case studies.

An indispensable resource for instruction, professional development, and research in digital computer arithmetic, Computer Arithmetic: Algorithms and Hardware Designs combines broad coverage of the underlying theories of computer arithmetic with numerous examples of practical designs, worked-out examples, and a large collection of meaningful problems.

Features:

DT Divided into 28 lecture-size chapters

DT Emphasizes both the underlying theories of computer arithmetic and actual hardware designs

DT Carefully links computer arithmetic to other subfields of computer engineering

DT Includes over 450 end-of-chapter problems ranging in complexity from simple exercises to mini-projects

DT Incorporates many examples of practical designs

DT Uses consistent standardized notation throughout

DT Instructor's manual includes solutions to text problems, additional exercises, test questions, and enlarged versions of figures and charts

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