- STAFF PICKS
- GIFTS + GIFT CARDS
- SELL BOOKS
- FIND A STORE
Ships in 1 to 3 days
available for shipping or prepaid pickup only
Available for In-store Pickup
in 7 to 12 days
More copies of this ISBN
Other titles in the IEEE Press Series on Microelectronic Systems series:
IEEE Press Series on Microelectronic Systems #13: DRAM Circuit Design: Fundamental and High-Speed Topicsby Brent Keeth
Synopses & Reviews
A modern, comprehensive introduction to DRAM for students and practicing chip designers
Dynamic Random Access Memory (DRAM) technology has been one of the greatestdriving forces in the advancement of solid-state technology. With its ability to produce high product volumes and low pricing, it forces solid-state memory manufacturers to work aggressively to cut costs while maintaining, if not increasing, their market share. As a result, the state of the art continues to advance owing to the tremendous pressure to get more memory chips from each silicon wafer, primarily through process scaling and clever design.
From a team of engineers working in memory circuit design, DRAM Circuit Design gives students and practicing chip designers an easy-to-follow, yet thorough, introductory treatment of the subject. Focusing on the chip designer rather than the end user, this volume offers expanded, up-to-date coverage of DRAM circuit design by presenting both standard and high-speed implementations. Additionally, it explores a range of topics: the DRAM array, peripheral circuitry, global circuitry and considerations, voltage converters, synchronization in DRAMs, data path design, and power delivery. Additionally, this up-to-date and comprehensive book features topics in high-speed design and architecture and the ever-increasing speed requirements of memory circuits.
The only book that covers the breadth and scope of the subject under one cover, DRAM Circuit Design is an invaluable introduction for students in courses on memory circuit design or advanced digital courses in VLSI or CMOS circuit design. It also serves as an essential, one-stop resource for academics, researchers, and practicing engineers.
Book News Annotation:
With its high product volumes and low pricing, Dynamic Random Access Memory (DRAM) is at the core of solid-state technology. However, market pressures have forced manufacturers to demand even more chips from each wafer, resulting in the need for better designs from chip designers. The co-authors focus on the needs of chip designers, describing the elements of the DRAM array, array architectures, peripheral circuitry, global circuitry and considerations, voltage converters, high-speed DRAM and die architectures, input circuit paths, output circuit paths, timing circuits, control logic design and power delivery. The co-authors include commentary on future work in high-performance memory and a concise glossary as well as accessible text and high-quality line art. The result is suitable for classroom use but doubles as a professional reference. Annotation ©2008 Book News, Inc., Portland, OR (booknews.com)
"DRAM Circuit Design, Second Edition" brings students and practicing chip designers an easy-to-follow, yet thorough, introductory to the subject. Focusing on the chip designer rather than the end-user, this "Second Edition" offers expanded, up-to-date coverage of DRAM circuit design by presenting both standard and high-speed implementations. Additionally, it explores a range of topics including: the DRAM array, peripheral circuitry, global circuitry and considerations, voltage converters, synchronization in DRAMs, data path design, and power delivery.
This easy-to-read tutorial focuses on the chip designer rather than the user. It covers the transistor-level design of DRAM building blocks, including architecture and the array, voltage regulators and pumps, and peripheral circuits.
This book presents both standard and high-speed implementations in a balanced approach to help IC designers prepare for the future. It includes details of delay-locked loops (DLLs), digital phase-locked loops (DPLLs), output circuit paths including transmission lines, terminations, and protocols.
About the Author
Brent Keeth is a Fellow in DRAM Design R&D at Micron Technology, Inc. His twenty-five years of industry experience spans radar systems, avionics components, communicationsystems, professional production and post-production equipment for the broadcast television industry, and solid-state memory. He holds over 400 U.S. and foreign granted or pending patents.
R. Jacob Baker, PhD, is an engineer, educator, and inventor. He has more than twenty years of engineering experience and holds over 200 granted or pending patents in integrated circuit design. Dr. Baker is the author of several circuit design books. For a detailed biography, see http://cmosedu.com/jbaker/jbaker.htm.
Brian Johnson is a Senior Design Engineer in DRAM Design R&D at Micron Technology, Inc. His research interests include asynchronous sequential circuits, clock synchronization circuits, and high-speed logic design. He holds over 60 granted or pending patents related to DRAM design and integrated circuit design.
Feng Lin, PhD, is a Senior Design Engineer in DRAM Design R&D at Micron Technology, Inc. His research interests include high-speed I/O circuits, PLL/DLL, and mixed-signal circuit design. Dr. Lin holds over 50 granted or pending patents related to DRAM and integrated circuit design.
Table of Contents
Chapter 1. An Introduction to DRAM.
Chapter 2. The DRAM Array.
Chapter 3. Array Architectures.
Chapter 4. The Peripheral Circuitry.
Chapter 5. Global Circuitry and Considerations.
Chapter 6. Voltage Converters.
Chapter 7. An Introduction to High-Speed DRAM.
Chapter 8. High-Speed Die Architectures.
Chapter 9. Input Circuit Paths.
Chapter 10. Output Circuit Paths.
Chapter 11. Timing Circuits.
Chapter 12. Control Logic Design.
Chapter 13. Power Delivery.
Chapter 14. Future Work in High-Performance Memory.
What Our Readers Are Saying
Business » Insurance