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Skew-Tolerant Circuit Design

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Skew-Tolerant Circuit Design Cover

 

Synopses & Reviews

Publisher Comments:

<BR>As advances in technology and circuit design boost operating frequencies of microprocessors, DSPs and other fast chips, new design challenges continue to emerge. One of the major performance limitations in today's chip designs is clock skew, the uncertainty in arrival times between a pair of clocks. Increasing clock frequencies are forcing many engineers to rethink their timing budgets and to use skew-tolerant circuit techniques for both domino and static circuits. While senior designers have long developed their own techniques for reducing the sequencing overhead of domino circuits, this knowledge has routinely been protected as trade secret and has rarely been shared. Skew-Tolerant Circuit Design presents a systematic way of achieving the same goal and puts it in the hands of all designers.<BR><P><BR>This book clearly presents skew-tolerant techniques and shows how they address the challenges of clocking, latching, and clock skew. It provides the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues. <BR>* Synthesizes the most recent advances in skew-tolerant design in one cohesive tutorial<BR>* Provides incisive instruction and advice punctuated by humorous illustrations<BR>* Includes exercises to test understanding of key concepts and solutions to selected exercises

Synopsis:

ecret and has rarely been shared. Skew-Tolerant Circuit Design presents a systematic way of achieving the same goal and puts it in the hands of all designers.

This book clearly presents skew-tolerant techniques and shows how they address the challenges of clocking, latching, and clock skew. It provides the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues.

Features:

  • Synthesizes the most recent advances in skew-tolerant design in one cohesive tutorial

  • Provides incisive instruction and advice punctuated by humorous illustrations

  • Includes exercises to test understanding of key concepts and solutions to selected exercises

Synopsis:

the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues.

Features:

  • Synthesizes the most recent advances in skew-tolerant design in one cohesive tutorial

  • Provides incisive instruction and advice punctuated by humorous illustrations

  • Includes exercises to test understanding of key concepts and solutions to selected exercises

Description:

Includes bibliographical references (p. 211-217) and index.

About the Author

David Harris is Assistant Professor of Engineering at Harvey Mudd College. He has made logical effort an integral part of his approach to teaching high-speed CMOS circuit design.

Table of Contents

Chapter 1 - Introduction

Chapter 2 - Fundamental Concepts

Chapter 3 - IP Switching

Chapter 4 - Tag Switching

Chapter 5 - MPLS Core Protocols

Chapter 6 - Quality of Service

Chapter 7 - Constraint­based routing

Chapter 8 - Virtual Private Networks

Product Details

ISBN:
9781558606364
Editor:
Harris, David
Publisher:
Morgan Kaufmann Publishers
Editor:
Harris, David
Author:
Harris, David
Location:
San Francisco
Subject:
Engineering - Electrical & Electronic
Subject:
Electronics - Circuits - General
Subject:
Computer Architecture
Subject:
Logic Design
Subject:
Integrated circuits
Subject:
Electronics - Circuits - VLSI
Subject:
Design and construction
Subject:
Synchronization
Subject:
Timing circuits.
Subject:
Integrated circuits -- Very large scale integration.
Subject:
Electronics - Microelectronics
Subject:
Electricity
Subject:
Timing circuits -- Design and construction.
Subject:
Electricity-General Electronics
Series:
The Morgan Kaufmann Series in Computer Architecture and Design
Series Volume:
108-409
Publication Date:
20000631
Binding:
TRADE PAPER
Language:
English
Illustrations:
Yes
Pages:
300
Dimensions:
9.25 x 7.375 in

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Related Subjects

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Skew-Tolerant Circuit Design New Trade Paper
0 stars - 0 reviews
$84.25 In Stock
Product details 300 pages Morgan Kaufmann Publishers - English 9781558606364 Reviews:
"Synopsis" by , ecret and has rarely been shared. Skew-Tolerant Circuit Design presents a systematic way of achieving the same goal and puts it in the hands of all designers.

This book clearly presents skew-tolerant techniques and shows how they address the challenges of clocking, latching, and clock skew. It provides the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues.

Features:

  • Synthesizes the most recent advances in skew-tolerant design in one cohesive tutorial

  • Provides incisive instruction and advice punctuated by humorous illustrations

  • Includes exercises to test understanding of key concepts and solutions to selected exercises

"Synopsis" by , the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues.

Features:

  • Synthesizes the most recent advances in skew-tolerant design in one cohesive tutorial

  • Provides incisive instruction and advice punctuated by humorous illustrations

  • Includes exercises to test understanding of key concepts and solutions to selected exercises

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