DETAILED TABLE OF CONTENTS
Each chapter begins with an Introduction and ends with a Summary and Problems.
Preface
PART I: DEVICES AND BASIC CIRCUITS
1. Introduction to Electronics
1.1. Signals
1.2. Frequency Spectrum of Signals
1.3. Analog and Digital Signals
1.4. Amplifiers
1.4.1. Signal Amplification
1.4.2. Amplifier Circuit Symbol
1.4.3. Voltage Gain
1.4.4. Power Gain and Current Gain
1.4.5. Expressing Gain in Decibels
1.4.6. The Amplifier Power Supplies
1.4.7. Amplifier Saturation
1.4.8. Nonlinear Transfer Characteristics and Biasing
1.4.9. Symbol Convention
1.5. Circuit Models for Amplifiers
1.5.1. Voltage Amplifiers
1.5.2. Cascaded Amplifiers
1.5.3. Other Amplifier Types
1.5.4. Relationships Between the Four Amplifier Models
1.6. Frequency Response of Amplifiers
1.6.1. Measuring the Amplifier Frequency Response
1.6.2. Amplifier Bandwidth
1.6.3. Evaluating the Frequency Response of Amplifiers
1.6.4. Single-Time-Constant Networks
1.6.5. Classification of Amplifiers Based on Frequency Response
1.7. Digital Logic Inverters
1.7.1. Function of the Inverter
1.7.2. The Voltage Transfer Characteristic (VTC)
1.7.3. Noise Margins
1.7.4. The Ideal VTC
1.7.5. Inverter Implementation
1.7.6. Power Dissipation
1.7.7. Propagation Delay
1.8. Circuit Simulation Using SPICE
2. Operational Amplifiers
2.1. The Ideal Op Amp
2.1.1. The Op-Amp Terminals
2.1.2. Function and Characteristics of the Ideal Op Amp
2.1.3. Differential and Common-Mode Signals
2.2. The Inverting Configuration
2.2.1. The Closed-Loop Gain
2.2.2. Effect of Finite Open-Loop Gain
2.2.3. Input and Output Resistances
2.2.4. An Important Application--The Weighted Summer
2.3. The Noninverting Configuration
2.3.1. The Closed-Loop Gain
2.3.2. Characteristics of the Noninverting Configuration
2.3.3. Effect of Finite Open-Loop Gain
2.3.4. The Voltage Follower
2.4. Difference Amplifiers
2.4.1. A Single Op-Amp Difference Amplifier
2.4.2. A Superior Circuit--The Instrumentation Amplifier
2.5. Effect of Finite Open-Loop Gain and Bandwidth on Circuit Performance
2.5.1. Frequency Dependence of the Open-Loop Gain
2.5.2. Frequency Response of Closed-Loop Amplifiers
2.6. Large-Signal Operation of Op Amps
2.6.1. Output Voltage Saturation
2.6.2. Output Current Limits
2.6.3. Slew Rate
2.6.4. Full-Power Bandwidth
2.7. DC Imperfections
2.7.1. Offset Voltage
2.7.2. Input Bias and Offset Currents
2.8. Integrators and Differentiators
2.8.1. The Inverting Configuration with General Impedances
2.8.2. The Inverting Integrator
2.8.3. The Op-Amp Differentiator
2.9. The SPICE Op-Amp Model and Simulation Examples
2.9.1. Linear Macromodel
2.9.2. Nonlinear Macromodel
3. Diodes
3.1. The Ideal Diode
3.1.1. Current-Voltage Characteristic
3.1.2. A Simple Application: The Rectifier
3.1.3. Another Application: Diode Logic Gates
3.2. Terminal Characteristics of Junction Diodes
3.2.1. The Forward-Bias Region
3.2.2. The Reverse-Bias Region
3.2.3. The Breakdown Region
3.3. Modeling the Diode Forward Characteristic
3.3.1. The Exponential Model
3.3.2. Graphical Analysis Using the Exponential Model
3.3.3. Iterative Analysis Using the Exponential Model
3.3.4. The Need for Rapid Analysis
3.3.5. The Piecewise-Linear Model
3.3.6. The Constant-Voltage-Drop Model
3.3.7. The Ideal-Diode Model
3.3.8. The Small-Signal Model
3.3.9. Use of the Diode Forward Drop in Voltage Regulation
3.3.10. Summary
3.4. Operation in the Reverse Breakdown Region--Zener Diodes
3.4.1. Specifying and Modeling the Zener Diode
3.4.2. Use of the Zener as a Shunt Regulator
3.4.3. Temperature Effects
3.4.4. A Final Remark
3.5. Rectifier Circuits
3.5.1. The Half-Wave Rectifier
3.5.2. The Full-Wave Rectifier
3.5.3. The Bridge Rectifier
3.5.4. The Rectifier with a Filter Capacitor--The Peak Rectifier
3.5.5. Precision Half-Wave Rectifier--The Super Diode
3.6. Limiting and Clamping Circuits
3.6.1. Limiter Circuits
3.6.2. The Clamped Capacitor or DC Restorer
3.6.3. The Voltage Doubler
3.7. Physical Operation of Diodes
3.7.1. Basic Semiconductor Concepts
3.7.2. The pn Junction Under Open-Circuit Conditions
3.7.3. The pn Junction Under Reverse-Bias Conditions
3.7.4. The pn Junction in the Breakdown Region
3.7.5. The pn Junction Under Forward-Bias Conditions
3.7.6. Summary
3.8. Special Diode Types
3.8.1. The Schottky-Barrier Diode (SBD)
3.8.2. Varactors
3.8.3. Photodiodes
3.8.4. Light-Emitting Diodes (LEDs)
3.9. The SPICE Diode Model and Simulation Examples
3.9.1. The Diode Model
3.9.2. The Zener Diode Model
4. MOS Field-Effect Transistors (MOSFETs)
4.1. Device Structure and Physical Operation
4.1.1. Device Structure
4.1.2. Operation with No Gate Voltage
4.1.3. Creating a Channel for Current Flow
4.1.4. Applying a Small vDS
4.1.5. Operation as vDS Is Increased
4.1.6. Derivation of the iD -vDS Relationship
4.1.7. The p-Channel MOSFET
4.1.8. Complementary MOS or CMOS
4.1.9. Operating the MOS Transistor in the Subthreshold Region
4.2. Current-Voltage Characteristics
4.2.1. Circuit Symbol
4.2.2. The iD -vDS Characteristics
4.2.3. Finite Output Resistance in Saturation
4.2.4. Characteristics of the p-Channel MOSFET
4.2.5. The Role of the Substrate--The Body Effect
4.2.6. Temperature Effects
4.2.7. Breakdown and Input Protection
4.2.8. Summary
4.3. MOSFET Circuits at DC
4.4. The MOSFET as an Amplifier and as a Switch
4.4.1. Large-Signal Operation--The Transfer Characteristic
4.4.2. Graphical Derivation of the Transfer Characteristic
4.4.3. Operation as a Switch
4.4.4. Operation as a Linear Amplifier
4.4.5. Analytical Expressions for the Transfer Characteristic
4.4.6. A Final Remark on Biasing
4.5. Biasing in MOS Amplifier Circuits
4.5.1. Biasing by Fixing VGS
4.5.2. Biasing by Fixing VG and Connecting a Resistance in the Source
4.5.3. Biasing Using a Drain-to-Gate Feedback Resistor
4.5.4. Biasing Using a Constant-Current Source
4.5.5. A Final Remark
4.6. Small-Signal Operation and Models
4.6.1. The DC Bias Point
4.6.2. The Signal Current in the Drain Terminal
4.6.3. The Voltage Gain
4.6.4. Separating the DC Analysis and the Signal Analysis
4.6.5. Small-Signal Equivalent-Circuit Models
4.6.6. The Transconductance gm
4.6.7. The T Equivalent-Circuit Model
4.6.8. Modeling the Body Effect
4.6.9. Summary
4.7 Single-Stage MOS Amplifiers.
4.7.1. The Basic Structure
4.7.2. Characterizing Amplifiers
4.7.3. The Common-Source (CS) Amplifier
4.7.4. The Common-Source Amplifier with a Source Resistance
4.7.5. The Common-Gate (CG) Amplifier
4.7.6. The Common-Drain or Source-Follower Amplifier
4.7.7. Summary and Comparisons
4.8. The MOSFET Internal Capacitances and High-Frequency Model
4.8.1. The Gate Capacitive Effect
4.8.2. The Junction Capacitances
4.8.3. The High-Frequency MOSFET Model
4.8.4. The MOSFET Unity-Gain Frequency ( fT )
4.8.5. Summary
4.9. Frequency Response of the CS Amplifier
4.9.1. The Three Frequency Bands
4.9.2. The High-Frequency Response
4.9.3. The Low-Frequency Response
4.9.4. A Final Remark
4.10. The CMOS Digital Logic Inverter
4.10.1. Circuit Operation
4.10.2. The Voltage Transfer Characteristic
4.10.3. Dynamic Operation
4.10.4. Current Flow and Power Dissipation
4.10.5. Summary
4.11. The Depletion-Type MOSFET
4.12. The SPICE MOSFET Model and Simulation Example
4.12.1. MOSFET Models
4.12.2. MOSFET Model Parameters
5. Bipolar Junction Transistors (BJTs)
5.1. Device Structure and Physical Operation
5.1.1. Simplified Structure and Modes of Operation 378
5.1.2. Operation of the npn Transistor in the Active Mode
5.1.3. Structure of Actual Transistors
5.1.4. The Ebers-Moll (EM) Model
5.1.5. Operation in the Saturation Mode
5.1.6. The pnp Transistor
5.2. Current-Voltage Characteristics
5.2.1. Circuit Symbols and Conventions
5.2.2. Graphical Representation of Transistor Characteristics
5.2.3. Dependence of iC on the Collector Voltage--The Early Effect
5.2.4. The Common-Emitter Characteristics
5.2.5. Transistor Breakdown
5.2.6. Summary
5.3. The BJT as an Amplifier and as a Switch
5.3.1. Large-Signal Operation--The Transfer Characteristic
5.3.2. Amplifier Gain
5.3.3. Graphical Analysis
5.3.4. Operation as a Switch
5.4. BJT Circuits at DC
5.5. Biasing in BJT Amplifier Circuits
5.5.1. The Classical Discrete-Circuit Bias Arrangement
5.5.2. A Two-Power-Supply Version of the Classical Bias Arrangement
5.5.3. Biasing Using a Collector-to-Base Feedback Resistor
5.5.4. Biasing Using a Constant-Current Source
5.6. Small-Signal Operation and Models
5.6.1. The Collector Current and the Transconductance
5.6.2. The Base Current and the Input Resistance at the Base
5.6.3. The Emitter Current and the Input Resistance at the Emitter
5.6.4. Voltage Gain
5.6.5. Separating the Signal and the DC Quantities
5.6.6. The Hybrid-p Model
5.6.7. The T Model
5.6.8. Application of the Small-Signal Equivalent Circuits
5.6.9. Performing Small-Signal Analysis Directly on the Circuit Diagram
5.6.10. Augmenting the Small-Signal Models to Account for the Early Effect
5.6.11. Summary
5.7. Single-Stage BJT Amplifiers
5.7.1. The Basic Structure
5.7.2. Characterizing BJT Amplifiers
5.7.3. The Common-Emitter (CE) Amplifier
5.7.4. The Common-Emitter Amplifier with an Emitter Resistance
5.7.5. The Common-Base (CB) Amplifier
5.7.6. The Common-Collector (CC) Amplifier or Emitter Follower
5.7.7. Summary and Comparisons
5.8. The BJT Internal Capacitances and High-Frequency Model
5.8.1. The Base-Charging or Diffusion Capacitance Cde
5.8.2. The Base-Emitter Junction Capacitance Cje
5.8.3. The Collector-Base Junction Capacitance Cm
5.8.4. The High-Frequency Hybrid-p Model
5.8.5. The Cutoff Frequency
5.8.6. Summary
5.9. Frequency Response of the Common-Emitter Amplifier
5.9.1. The Three Frequency Bands
5.9.2. The High-Frequency Response
5.9.3. The Low-Frequency Response
5.9.4. A Final Remark
5.10. The Basic BJT Digital Logic Inverter
5.10.1. The Voltage Transfer Characteristic
5.10.2. Saturated Versus Nonsaturated BJT Digital Circuits
5.11. The SPICE BJT Model and Simulation Examples
5.11.1. The SPICE Ebers-Moll Model of the BJT
5.11.2. The SPICE Gummel-Poon Model of the BJT
5.11.3. The SPICE BJT Model Parameters
5.11.4. The BJT Model Parameters BF and BR in SPICE
PART II: ANALOG AND DIGITAL INTEGRATED CIRCUITS
6. Single-Stage Integrated-Circuit Amplifiers
6.1. IC Design Philosophy
6.2. Comparison of the MOSFET and the BJT
6.2.1. Typical Values of MOSFET Parameters
6.2.2. Typical Values of IC BJT Parameters
6.2.3. Comparison of Important Characteristics
6.2.4. Combining MOS and Bipolar Transistors--BiCMOS Circuits
6.2.5 Validity of the Square-Law MOSFET Model.
6.3. IC Biasing--Current Sources, Current Mirrors, and Current-Steering Circuits
6.3.1. The Basic MOSFET Current Source
6.3.2. MOS Current-Steering Circuits
6.3.3. BJT Circuits
6.4. High-Frequency Response--General Considerations
6.4.1. The High-Frequency Gain Function
6.4.2. Determining the 3-dB Frequency fH
6.4.3. Using Open-Circuit Time Constants for the Approximate Determination of fH
6.4.4. Miller's Theorem
6.5. The Common-Source and Common-Emitter Amplifiers with Active Loads
6.5.1. The Common-Source Circuit
6.5.2. CMOS Implementation of the Common-Source Amplifier
6.5.3. The Common-Emitter Circuit
6.6. High-Frequency Response of the CS and CE Amplifiers
6.6.1. Analysis Using Miller's Theorem
6.6.2. Analysis Using Open-Circuit Time Constants
6.6.3. Exact Analysis
6.6.4. Adapting the Formulas for the Case of the CE Amplifier
6.6.5. The Situation When Rsig Is Low
6.7. The Common-Gate and Common-Base Amplifiers with Active Loads
6.7.1. The Common-Gate Amplifier
6.7.2. The Common-Base Amplifier
6.7.3. A Concluding Remark
6.8. The Cascode Amplifier
6.8.1. The MOS Cascode
6.8.2. Frequency Response of the MOS Cascode
6.8.3. The BJT Cascode
6.8.4. A Cascode Current Source
6.8.5. Double Cascoding
6.8.6. The Folded Cascode
6.8.7. BiCMOS Cascodes
6.9. The CS and CE Amplifiers with Source (Emitter) Degeneration
6.9.1. The CS Amplifier with a Source Resistance
6.9.2. The CE Amplifier with an Emitter Resistance
6.10. The Source and Emitter Followers
6.10.1. The Source Follower
6.10.2. Frequency Response of the Source Follower
6.10.3. The Emitter Follower
6.11. Some Useful Transistor Pairings
6.11.1. The CD- CS, CC-CE and CD-CE Configurations
6.11.2. The Darlington Configuration
6.11.3. The CC-CB and CD-CG Configurations
6.12. Current-Mirror Circuits with Improved Performance
6.12.1. Cascode MOS Mirrors
6.12.2. A Bipolar Mirror with Base-Current Compensation
6.12.3. The Wilson Current Mirror
6.12.4. The Wilson MOS Mirror
6.12.5. The Widlar Current Source
6.13. SPICE Simulation Examples
7. Differential and Multistage Amplifiers
7.1. The MOS Differential Pair
7.1.1. Operation with a Common-Mode Input Voltage
7.1.2. Operation with a Differential Input Voltage
7.1.3. Large-Signal Operation
7.2. Small-Signal Operation of the MOS Differential Pair
7.2.1. Differential Gain
7.2.2. Common-Mode Gain and Common-Mode Rejection Ratio (CMRR)
7.3. The BJT Differential Pair
7.3.1. Basic Operation
7.3.2. Large-Signal Operation
7.3.3. Small-Signal Operation
7.4. Other Nonideal Characteristics of the Differential Amplifier
7.4.1. Input Offset Voltage of the MOS Differential Pair
7.4.2. Input Offset Voltage of the Bipolar Differential Pair
7.4.3. Input Bias and Offset Currents of the Bipolar Pair
7.4.4. Input Common-Mode Range
7.4.5. A Concluding Remark
7.5. The Differential Amplifier with Active Load
7.5.1. Differential-to-Single-Ended Conversion
7.5.2. The Active-Loaded MOS Differential Pair
7.5.3. Differential Gain of the Active-Loaded MOS Pair
7.5.4. Common-Mode Gain and CMRR
7.5.5. The Bipolar Differential Pair with Active Load
7.6. Frequency Response of the Differential Amplifier
7.6.1. Analysis of the Resistively Loaded MOS Amplifier
7.6.2. Analysis of the Active-Loaded MOS Amplifier
7.7. Multistage Amplifiers
7.7.1. A Two-Stage CMOS Op Amp
7.7.2. A Bipolar Op Amp
7.8. SPICE Simulation Example
8. Feedback
8.1. The General Feedback Structure
8.2. Some Properties of Negative Feedback
8.2.1. Gain Desensitivity
8.2.2. Bandwidth Extension
8.2.3. Noise Reduction
8.2.4. Reduction in Nonlinear Distortion
8.3. The Four Basic Feedback Topologies
8.3.1. Voltage Amplifiers
8.3.2. Current Amplifiers
8.3.3. Transconductance Amplifiers
8.3.4. Transresistance Amplifiers
8.4. The Series-Shunt Feedback Amplifier
8.4.1. The Ideal Situation
8.4.2. The Practical Situation
8.4.3. Summary
8.5. The Series-Series Feedback Amplifier
8.5.1. The Ideal Case
8.5.2. The Practical Case
8.5.3. Summary
8.6. The Shunt-Shunt and Shunt-Series Feedback Amplifiers
8.6.1. The Shunt-Shunt Configuration
8.6.2. An Important Note
8.6.3. The Shunt-Series Configuration
8.6.4. Summary of Results
8.7. Determining the Loop Gain
8.7.1. An Alternative Approach for Finding Ass
8.7.2. Equivalence of Circuits from a Feedback-Loop Point of View
8.8. The Stability Problem
8.8.1. Transfer Function of the Feedback Amplifier
8.8.2. The Nyquist Plot
8.9. Effect of Feedback on the Amplifier Poles
8.9.1. Stability and Pole Location
8.9.2. Poles of the Feedback Amplifier
8.9.3. Amplifier with Single-Pole Response
8.9.4. Amplifier with Two-Pole Response
8.9.5. Amplifiers with Three or More Poles
8.10. Stability Study Using Bode Plots
8.10.1. Gain and Phase Margins
8.10.2. Effect of Phase Margin on Closed-Loop Response
8.10.3. An Alternative Approach for Investigating Stability
8.11. Frequency Compensation
8.11.1. Theory
8.11.2. Implementation
8.11.3. Miller Compensation and Pole Splitting
8.12. SPICE Simulation Example
9. Operational-Amplifier and Data-Converter Circuits
9.1. The Two-Stage CMOS Op Amp
9.1.1. The Circuit
9.1.2. Input Common-Mode Range and Output Swing
9.1.3. Voltage Gain
9.1.4. Frequency Response
9.1.5. Slew Rate
9.2. The Folded-Cascode CMOS Op Amp
9.2.1. The Circuit
9.2.2. The Input Common-Mode Range and the Output Voltage Swing
9.2.3. Voltage Gain
9.2.4. Frequency Response
9.2.5. Slew Rate
9.2.6. Increasing the Input Common-Mode Range: Rail-to-Rail Operation
9.2.7. Increasing the Output Voltage Range: The Wide-Swing Current Mirror
9.3. The 741 Op-Amp Circuit
9.3.1. Bias Circuit
9.3.2. Short-Circuit Protection Circuitry
9.3.3. The Input Stage
9.3.4. The Second Stage
9.3.5. The Output Stage
9.3.6. Device Parameters
9.4. DC Analysis of the 741
9.4.1. Reference Bias Current
9.4.2. Input-Stage Bias
9.4.3. Input Bias and Offset Currents
9.4.4. Input Offset Voltage
9.4.5. Input Common-Mode Range
9.4.6. Second-Stage Bias
9.4.7. Output-Stage Bias
9.4.8. Summary
9.5. Small-Signal Analysis of the 741
9.5.1. The Input Stage
9.5.2. The Second Stage
9.5.3. The Output Stage
9.6. Gain, Frequency Response, and Slew Rate of the 741
9.6.1. Small-Signal Gain
9.6.2. Frequency Response
9.6.3. A Simplified Model
9.6.4. Slew Rate
9.6.5. Relationship Between ft and SR
9.7. Data Converters--an Introduction
9.7.1. Digital Processing of Signals
9.7.2. Sampling of Analog Signals
9.7.3. Signal Quantization
9.7.4. The A/D and D/A Converters as Functional Blocks
9.8. D/A Converter Circuits
9.8.1. Basic Circuit Using Binary-Weighted Resistors
9.8.2. R-2R Ladders
9.8.3. A Practical Circuit Implementation
9.8.4. Current Switches
9.9. A/D Converter Circuits
9.9.1. The Feedback-Type Converter
9.9.2. The Dual-Slope A/D Converter
9.9.3. The Parallel or Flash Converter
9.9.4 The Charge-Redistribution Converter.
9.10. SPICE Simulation Example
10. Digital CMOS Logic Circuits
10.1. Digital Circuit Design: An Overview
10.1.1. Digital IC Technologies and Logic-Circuit Families
10.1.2. Logic-Circuit Characterization
10.1.3. Styles for Digital System Design
10.1.4. Design Abstraction and Computer Aids
10.2. Design and Performance Analysis of the CMOS Inverter
10.2.1. Circuit Structure
10.2.2. Static Operation
10.2.3. Dynamic Operation
10.2.4. Dynamic Power Dissipation
10.3. CMOS Logic-Gate Circuits
10.3.1. Basic Structure
10.3.2. The Two-Input NOR Gate
10.3.3. The Two-Input NAND Gate
10.3.4. A Complex Gate
10.3.5. Obtaining the PUN from the PDN and Vice Versa
10.3.6. The Exclusive-OR Function
10.3.7. Summary of the Synthesis Method
10.3.8. Transistor Sizing
10.3.9. Effects of Fan-In and Fan-Out on Propagation Delay
10.4. Pseudo-NMOS Logic Circuits
10.4.1. The Pseudo-NMOS Inverter
10.4.2. Static Characteristics
10.4.3. Derivation of the VTC
10.4.4. Dynamic Operation
10.4.5. Design
10.4.6. Gate Circuits
10.4.7. Concluding Remarks
10.5. Pass-Transistor Logic Circuits
10.5.1. An Essential Design Requirement
10.5.2. Operation with NMOS Transistors as Switches
10.5.3. The Use of CMOS Transmission Gates as Switches
10.5.4. Pass-Transistor Logic Circuit Examples
10.5.5. A Final Remark
10.6. Dynamic Logic Circuits
10.6.1. Basic Principle
10.6.2. Nonideal Effects
10.6.3. Domino CMOS Logic
10.6.4. Concluding Remarks
10.7. Spice Simulation Example
PART III: SELECTED TOPICS
11. Memory and Advanced Digital Circuits
11.1. Latches and Flip-flops
11.1.1. The Latch
11.1.2. The SR Flip-Flop
11.1.3. CMOS Implementation of SR Flip-Flops
11.1.4. A Simpler CMOS Implementation of the Clocked SA Flip-Flop
11.1.5. D Flip-Flop Circuits
11.2. Multivibrator Circuits
11.2.1. A CMOS Monostable Circuit
11.2.2. An Astable Circuit
11.2.3. The Ring Oscillator
11.3. Semiconductor Memories: Types and Architectures
11.3.1. Memory-Chip Organization
11.3.2. Memory-Chip Timing
11.4. Random-Access Memory (RAM) Cells
11.4.1. Static Memory Cell
11.4.2. Dynamic Memory Cell
11.5. Sense Amplifiers and Address Decoders
11.5.1. The Sense Amplifier
11.5.2. The Row-Address Decoder
11.5.3. The Column-Address Decoder
11.6. Read-Only Memory (ROM)
11.6.1. A MOS ROM
11.6.2. Mask-Programmable ROMs
11.6.3. Programmable ROMs (PROMs and EPROMs)
11.7. Emitter-Coupled Logic (ECL)
11.7.1. The Basic Principle
11.7.2. ECL Families
11.7.3. The Basic Gate Circuit
11.7.4. Voltage Transfer Characteristics
11.7.5. Fan-Out
11.7.6. Speed of Operation and Signal Transmission
11.7.7. Power Dissipation
11.7.8. Thermal Effects
11.7.9. The Wired-OR Capability
11.7.10. Some Final Remarks
11.8. BiCMOS Digital Circuits
11.8.1. The BiCMOS Inverter
11.8.2. Dynamic Operation
11.8.3. BiCMOS Logic Gates
11.9. SPICE Simulation Example
12. Filters and Tuned Amplifiers
12.1. Filter Transmission, Types, and Specification
12.1.1. Filter Transmission
12.1.2. Filter Types
12.1.3. Filter Specification
12.2. The Filter Transfer Function
12.3. Butterworth and Chebyshev Filters
12.3.1. The Butterworth Filter
12.3.2. The Chebyshev Filter
12.4. First-Order and Second-Order Filter Functions
12.4.1. First-Order Filters
12.4.2. Second-Order Filter Functions
12.5. The Second-Order LCR Resonator
12.5.1. The Resonator Natural Modes
12.5.2. Realization of Transmission Zeros
12.5.3. Realization of the Low-Pass Function
12.5.4. Realization of the High-Pass Function
12.5.5. Realization of the Bandpass Function
12.5.6. Realization of the Notch Functions
12.5.7. Realization of the All-Pass Function
12.6. Second-Order Active Filters Based on Inductor Replacement
12.6.1. The Antoniou Inductance-Simulation Circuit
12.6.2. The Op Amp-RC Resonator
12.6.3. Realization of the Various Filter Types
12.6.4. The All-Pass Circuit
12.7. Second-Order Active Filters Based on the Two-Integrator-Loop Topology
12.7.1. Derivation of the Two-Integrator-Loop Biquad
12.7.2. Circuit Implementation
12.7.3. An Alternative Two-Integrator-Loop Biquad Circuit
12.7.4. Final Remarks
12.8. Single-Amplifier Biquadratic Active Filters
12.8.1. Synthesis of the Feedback Loop
12.8.2. Injecting the Input Signal
12.8.3. Generation of Equivalent Feedback Loops
12.9. Sensitivity
12.10. Switched-Capacitor Filters
12.10.1. The Basic Principle
12.10.2. Practical Circuits
12.10.3. A Final Remark
12.11. Tuned Amplifiers
12.11.1. The Basic Principle
12.11.2. Inductor Losses
12.11.3. Use of Transformers
12.11.4. Amplifiers with Multiple Tuned Circuits
12.11.5. The Cascode and the CC-CB Cascade
12.11.6. Synchronous Tuning
12.11.7. Stagger-Tuning
12.12. SPICE Simulation Examples
13. Signal Generators and Waveform-Shaping Circuits
13.1. Basic Principles of Sinusoidal Oscillators
13.1.1. The Oscillator Feedback Loop
13.1.2. The Oscillation Criterion
13.1.3. Nonlinear Amplitude Control
13.1.4. A Popular Limiter Circuit for Amplitude Control
13.2. Op Amp-RC Oscillator Circuits
13.2.1. The Wien-Bridge Oscillator
13.2.2. The Phase-Shift Oscillator
13.2.3. The Quadrature Oscillator
13.2.4. The Active-Filter-Tuned Oscillator
13.2.5. A Final Remark
13.3. LC and Crystal Oscillators
13.3.1. LC-Tuned Oscillators
13.3.2. Crystal Oscillators
13.4. Bistable Multivibrators
13.4.1. The Feedback Loop
13.4.2. Transfer Characteristics of the Bistable Circuit
13.4.3. Triggering the Bistable Circuit
13.4.4. The Bistable Circuit as a Memory Element
13.4.5. A Bistable Circuit with Noninverting Transfer Characteristics
13.4.6. Application of the Bistable Circuit as a Comparator
13.4.7. Making the Output Levels More Precise
13.5. Generation of Square and Triangular Waveforms Using Astable Multivibrators
13.5.1. Operation of the Astable Multivibrator
13.5.2. Generation of Triangular Waveforms
13.6. Generation of a Standardized Pulse--The Monostable Multivibrator
13.7. Integrated-Circuit Timers
13.7.1. The 555 Circuit
13.7.2. Implementing a Monostable Multivibrator Using the 555 IC
13.7.3. An Astable Multivibrator Using the 555 IC
13.8. Nonlinear Waveform-Shaping Circuits
13.8.1. The Breakpoint Method
13.8.2. The Nonlinear-Amplification Method
13.9. Precision Rectifier Circuits
13.9.1. Precision Half-Wave Rectifier-The "Superdiode"
13.9.2. An Alternative Circuit
13.9.3. An Application: Measuring AC Voltages
13.9.4. Precision Full-Wave Rectifier
13.9.5. A Precision Bridge Rectifier for Instrumentation Applications
13.9.6. Precision Peak Rectifiers
13.9.7. A Buffered Precision Peak Detector
13.9.8. A Precision Clamping Circuit
13.10. SPICE Simulation Examples
14. Output Stages and Power Amplifiers
14.1. Classification of Output Stages
14.2. Class A Output Stage
14.2.1. Transfer Characteristic
14.2.2. Signal Waveforms
14.2.3. Power Dissipation
14.2.4. Power-Conversion Efficiency
14.3. Class B Output Stage
14.3.1. Circuit Operation
14.3.2. Transfer Characteristic
14.3.3. Power-Conversion Efficiency
14.3.4. Power Dissipation
14.3.5. Reducing Crossover Distortion
14.3.6. Single-Supply Operation
14.4. Class AB Output Stage
14.4.1. Circuit Operation
14.4.2. Output Resistance
14.5. Biasing the Class AB Circuit
14.5.1. Biasing Using Diodes
14.5.2. Biasing Using the VBE Multiplier
14.6. Power BJTs
14.6.1. Junction Temperature
14.6.2. Thermal Resistance
14.6.3. Power Dissipation Versus Temperature
14.6.4. Transistor Case and Heat Sink
14.6.5. The BJT Safe Operating Area
14.6.6. Parameter Values of Power Transistors
14.7. Variations on the Class AB Configuration
14.7.1. Use of Input Emitter Followers
14.7.2. Use of Compound Devices
14.7.3. Short-Circuit Protection
14.7.4. Thermal Shutdown
14.8. IC Power Amplifiers
14.8.1. A Fixed-Gain IC Power Amplifier
14.8.2. Power Op Amps
14.8.3. The Bridge Amplifier
14.9. MOS Power Transistors
14.9.1. Structure of the Power MOSFET
14.9.2. Characteristics of Power MOSFETs
14.9.3. Temperature Effects
14.9.4. Comparison with BJTs
14.9.5. A Class AB Output Stage Utilizing MOSFETs
14.10. SPICE Simulation Example
APPENDIXES
A. VLSI Fabrication Technology
B. Two-Port Network Parameters
C. Some Useful Network Theorems
D. Single-Time-Constant Circuits
E. s-Domain Analysis: Poles, Zeros, and Bode Plots
F. Bibliography
G. Standard Resistance Values and Unit Prefixes
H. Answers to Selected Problems
Index