Synopses & Reviews
Issues relating to the high-K gate dielectric are among the greatest challenges for the evolving International Technology Roadmap for Semiconductors (ITRS). More than just an historical overview, this book will assess previous and present approaches related to scaling the gate dielectric and their impact, along with the creative directions and forthcoming challenges that will define the future of gate dielectric scaling technology. Topics include: an extensive review of Moore's Law, the classical regime for SiO2 gate dielectrics; the transition to silicon oxynitride gate dielectrics; the transition to high-K gate dielectrics (including the drive towards equivalent oxide thickness in the single-digit nanometer regime); and future directions and issues for ultimate technology generation scaling. The vision, wisdom, and experience of the team of authors will make this book a timely, relevant, and interesting, resource focusing on fundamentals of the 45 nm Technology Generation and beyond.
Synopsis
Issues relating to the high-K gate dielectric are among the greatest challenges for the evolving International Technology Roadmap for Semiconductors (ITRS). More than just an historical overview, this book will assess previous and present approaches related to scaling the gate dielectric and their impact, along with the creative directions and forthcoming challenges that will define the future of gate dielectric scaling technology.
Table of Contents
The Economic Implications of Moore's Law.- Brief Notes on the History of Gate Dielectrics in MOS Devices.- SiO2-Base MOSFETS: Film Growth and Si-SiO2-Interface Properties.- Oxide Reliability Issues.- Gate Dielectric Scaling to 2.0-1.0 nm: SiO2 and Silicon Oxynitride.- Optimal Scaling Methodologies and Transistor Performance Utilizing SiO2/Silicon Oxynitride.- Silicon Oxynitride Gate Dielectric for Reducing Gate Leakage and Boron Penetration Prior to High-K Gate Dielectric Implementation.- Alternative Dielectrics for Silicon-Based Transistors: Selection via Multiple Criteria.- Materials Issues for High-K Gate Dielectric Selection and Integration.- Designing Interface Composition and Structure in High Dielectric Constant Gate Stacks.- Electronic Structure of Alternative High-K Dielectrics.- Physicochemical Properties of Selected 4d, 5d, and Rare-Earth Metals in Silicon.- High-K Gate Dielectric Deposition Technologies.- Issues in Metal Gate Electrode Selection for Bulk CMOS Devices.- CMOS IC Fabrication Issues for High-K Gate Dielectric and Alternate Electrode Materials.- Characterization and Metrology of Medium Dielectric Constant Gate Dielectric Films.- Electrical Measurement Issues for Alternative Gate Stack Systems.- High-K Gate Dielectric Materials Integrated Circuit Device Design Issues.- High-K Crystalline Gate Dielectrics: A Research Perspective.- High-K Crystalline Gate Dielectrics: An IC Manufacturer's Perspective.- Advanced MOS-Devices.